#undef SERIALIZE
struct cpu_caches cpu_caches = {
- .dline_size = 0x80,
- .log_dline_size = 7,
+ .dline_size = 0x80,
+ .log_dline_size = 7,
.dlines_per_page = PAGE_SIZE >> 7,
- .iline_size = 0x80,
- .log_iline_size = 7,
+ .iline_size = 0x80,
+ .log_iline_size = 7,
.ilines_per_page = PAGE_SIZE >> 7,
};
#define __read_mostly
struct cpu_caches {
- u32 dsize; /* L1 d-cache size */
- u32 dline_size; /* L1 d-cache line size */
- u32 log_dline_size;
- u32 dlines_per_page;
- u32 isize; /* L1 i-cache size */
- u32 iline_size; /* L1 i-cache line size */
- u32 log_iline_size;
- u32 ilines_per_page;
+ u32 dsize; /* L1 d-cache size */
+ u32 dline_size; /* L1 d-cache line size */
+ u32 log_dline_size;
+ u32 dlines_per_page;
+ u32 isize; /* L1 i-cache size */
+ u32 iline_size; /* L1 i-cache line size */
+ u32 log_iline_size;
+ u32 ilines_per_page;
};
extern struct cpu_caches cpu_caches;
#endif
static __inline__ void clear_page(void *addr)
{
- unsigned long lines, line_size;
+ unsigned long lines, line_size;
- line_size = cpu_caches.dline_size;
- lines = cpu_caches.dlines_per_page;
+ line_size = cpu_caches.dline_size;
+ lines = cpu_caches.dlines_per_page;
- __asm__ __volatile__(
- "mtctr %1 # clear_page\n\
-1: dcbz 0,%0\n\
- add %0,%0,%3\n\
- bdnz+ 1b"
+ __asm__ __volatile__(
+ "mtctr %1 # clear_page\n\
+1: dcbz 0,%0\n\
+ add %0,%0,%3\n\
+ bdnz+ 1b"
: "=r" (addr)
: "r" (lines), "0" (addr), "r" (line_size)
- : "ctr", "memory");
+ : "ctr", "memory");
}
extern void copy_page(void *dp, void *sp);